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Semiconductor Manufacturing Programme

The Semiconductor Manufacturing Programme is a government‑led initiative to develop a domestic ecosystem for designing and fabricating integrated circuits. It aims to reduce reliance on imports, boost high‑tech employment, and position the country as a global chip hub. For example, the programme earmarks ₹76,000 crore to establish three advanced fabrication plants by 2025.

The Semiconductor Manufacturing Programme (SMP) is a government‑driven, multi‑billion‑rupee initiative that seeks to build a self‑sufficient domestic ecosystem for the design and fabrication of integrated circuits. Launched in the Union Budget of 2022‑23, the programme earmarks ₹76,000 crore to commission three advanced semiconductor fabs by 2025, complementing a ₹10,000 crore design fund, and positions the country to shift from a net importer of chips to a prospective global hub for high‑value electronics manufacturing.

Origins and Historical Background

The SMP traces its lineage to the National Policy on Electronics (2019), which first identified semiconductor self‑reliance as a strategic priority. In February 2022, Finance Minister Nirmala Sitharaman announced the dedicated budget allocation, marking the first time a single programme received a stand‑alone financial envelope for chip production. The initiative is administered by the Ministry of Electronics and Information Technology (MeitY) through the newly created Semiconductor Manufacturing Mission, chaired by the Minister of Electronics and Information Technology. Its legal footing rests on the “Semiconductor and Display Manufacturing Scheme” under the Ministry of Finance (Budget 2022‑23, Chapter II, Article 12).

How It Works: Mechanism and Incentives

The SMP operates on a layered incentive structure. First, capital subsidies of up to 30 % of project cost are offered to fab developers, subject to a cap of ₹15,000 crore per plant. Second, a five‑year tax holiday on profits from semiconductor manufacturing is granted under Section 115JB of the Income Tax Act. Third, the Production‑Linked Incentive (PLI) scheme, launched in 2021, provides performance‑based payouts of up to 30 % of incremental sales, with a collective ceiling of ₹30,000 crore for the sector. The design fund, managed by the Department of Science and Technology, disburses grants of up to ₹2,000 crore to domestic design houses that achieve International Roadmap for Devices and Systems (IRDS) milestones. A dedicated “Semiconductor Mission” board coordinates land allocation, water‑security clearances, and talent development through partnerships with the Indian Institutes of Technology (IITs) and the Indian Institute of Science (IISc).

Current Status and Implementation

As of March 2024, three fab projects have secured government approval. Tata Group’s $10 billion semiconductor assembly and test facility in Gujarat is slated for commercial operation in Q4 2025, while Foxconn’s proposed 65‑nm fab in Tamil Nadu and Vedanta’s 45‑nm plant in Karnataka have each received ₹5,000 crore in capital subsidies. Collectively, the three fabs are expected to generate approximately 2.5 lakh direct jobs and contribute ₹1.2 lakh crore to GDP by 2030. The design fund has already awarded ₹1,200 crore to five start‑ups, including Saankhya Labs and Sankalp Semiconductor, which have filed patents on AI‑accelerator IP blocks. MeitY reports that import dependence for semiconductors has fallen from 95 % in 2021 to roughly 88 % in early 2024, reflecting the nascent impact of the programme.

Significance and Strategic Impact

Beyond the immediate economic stimulus, the SMP is intended to secure supply‑chain resilience for critical sectors such as defense, telecommunications, and automotive. By localising wafer production, the programme reduces exposure to geopolitical disruptions that have plagued global chip markets since 2020. The projected annual export potential of ₹30,000 crore by 2030 aligns with the “Atmanirbhar Bharat” vision of strategic autonomy. Moreover, the programme catalyses a talent pipeline: MeitY’s “Chip‑Design Academy” has enrolled 1,200 engineers in its first cohort, and a 2023 amendment to the National Education Policy earmarks 200 scholarships for semiconductor‑focused postgraduate research.

International Comparison

India’s ₹76,000 crore allocation is modest compared with the United States’ CHIPS Act, which authorises $52 billion in subsidies, and Taiwan’s long‑standing public‑private partnership that underpins TSMC’s $100 billion fab expansions. However, the SMP’s emphasis on simultaneous design and manufacturing incentives mirrors South Korea’s “Semiconductor Industry Promotion Act,” which couples tax breaks with R&D grants. By leveraging a mix of capital subsidies, tax holidays, and performance‑linked incentives, the SMP seeks to attract multinational investors while nurturing indigenous design capabilities—a hybrid model that differentiates it from the more production‑centric approaches of East Asia.